PUT-ting it all together.
A circuit collection of what you can do with a transistor combination called Programmable Unijunction Transistor (PUT)
Lets step into the world of old-fashioned analog electronics and see what interesting stuff we can do with a rather simple transistor combination existing of 2 complementary transistors. The self-latching behaviour of this transistor combination can be compared with the behaviour of a thyristor (aka SCR : Silicon Controlled Rectifier) or a unijunction transistor. The unijunction transistor (UJT) was popular in the 70ies, because it was easy to build sawtooth or pulse generators with an UJT and a few extra passive components. UJT's. You can still find them but you rarely see them in modern designs.
The transistor combination that we are describing here exhibits a similar behaviour as the UJT and is often called a Programmable Unijunction Transistor, abbreviated to "PUT". It is programmable because you can "program" the threshold level at which the transistor combination will latch itself into conduction.
In this lab project i will show you a collection of circuits that can be built around a "PUT" :
1) Let me Introduce to you : the PUT
In figure 1, the connection between the 2 complementary transistors forming the PUT is shown.
The configuration has a similar behaviour as a thyristor (SCR), but it is NOT a direct replacement for a thyristor ! Therefore the circuit is also called a "TUT" : Transistorised Universal Thyristor. Let's take a look at the behaviour of this configuration and compare it with the behaviour of a thyristor. What do we know about a thyristor ? Well, it has a gate, an anode and a cathode. When a small current is injected into the gate (milli-amperes), the thyristor will start to conduct, provided that the anode-to-cathode current is above a certain threshold, called latching current (IL). Once the thyristor is conducting, the gate can be disconnected, and the thyristor will still keep on conducting. The only way to make the thyristor stop conducting, is to make the anode-to-cathode current lower than the minimal holding current. So cutting off the power supply briefly will make the thyristor stop conducting again and return to the initial situation.
2) PUT Behaves Similar to a Thyristor (aka SCR)
The circuit shown in figure 2a behaves like a thyristor.
We can even choose between 2 gates: a positive gate connected to SWITCH2 and a negative gate connected to SWITCH1. At power on, SWITCH1 and SWITCH2 are open. Q1 will not conduct, because it's base is pulled high by R1. Q2 will not conduct, because it's base is floating and does not receive any current. Because Q1 does not conduct, the OUTput will be high.When SWITCH2 is open and SWITCH1 is closed, the base of Q1 is pulled to ground and Q1 will conduct. When Q1 conducts, the OUTput will go low and the base of Q2 receives current via R2, so Q2 will also conduct. When Q2 conducts, the base of Q1, which was pulled low by SWITCH1, is now pulled low by Q2. Due to this self-latching effect, Q1 will continue conducting, even when SWITCH1 is opened again. So when SWITCH1 is closed shortly, the OUTput will go low and stay low. The only way to reset the circuit back to the initial state, is to briefly disconnect it from the power supply. This is the same self-latching behaviour as a thyristor.When SWITCH1 is open and SWITCH2 is closed, the base of Q2 is pulled high and Q2 will conduct. When Q2 conducts, the base of Q1 is pulled low and Q1 will conduct. When Q1 conducts, the base of Q2, which was pulled high by SWITCH2, is now pulled high by Q1 via R2. Due to this self-latching effect, Q2 will continue conducting, even when SWITCH2 is opened again. So when SWITCH2 is closed shortly, the OUTput will go low and stay low. The only way to reset the circuit back to the initial state, is to briefly disconnect it from the power supply. This is the same self-latching behaviour as a thyristor.
Why the transistor combination is also called a PUT : Programmable Unijunction Transistor ? The difference between an ordinary unijunction transistor and a programmable unijunction transistor is the fact that the trip voltage, at which the transistor starts conducting, can be programmed by a reference voltage, that is applied to the gate of the PUT.
In figure 2b, two gate pins are shown because the PUT can be used either with Gate 1 or with Gate 2 used as a reference voltage input. When using Gate 1, the PUT will conduct when the anode voltage exceeds the reference voltage on Gate 1 with 0.7V (base emitter voltage drop). When using Gate 2, the PUT will conduct when the cathode becomes 0.7V lower than the voltage at Gate 2.
3) Simple PUT Circuit Explained
In figure 3 practical circuits are shown illustrating the behaviour of the PUT transistor combination.
The left and right circuits have exactly the same function. The right circuit is the "upside down" version of the left one.
Because R1 = R2, the reference voltage at node 1 is half the supply voltage, so 5 / 2 = 2.5V.
The voltage at node 2 can be set with a potmeter.
Another example of the behaviour of a PUT is shown in figure 4.
When the power is connected, the LED will illuminate, getting its current via R1 from the power supply. The PUT formed by Q1 and Q2 is not active because the base of Q1 is pulled down to ground by R4 and the base of Q2 is pulled up to the voltage over the LED. So both transistors are not conducting. From the moment that the switch is pressed, the base of Q1 receives current from the power supply via R3, which limits this current. Q1 starts conducting and pulls down the base of Q2, so current can flow through the base emitter junction of Q2 causing Q2 to conduct. Q2 will now pull up the base of Q1, so the base of Q1 receives current via Q2. This means that the PUT combination is now latched into conduction, thereby "short-circuiting" the LED, which will extinguish.
When releasing the switch, the PUT combination remains latched and the LED will stay off.
When the power supply is disconnected briefly, the PUT combination "unlatches" and the LED will illuminate again.
5) PUT Relaxation Oscillator With Rising Ramp Waveform
The circuit in figure 5 shows an implementations of a relaxation oscillator using the PUT transistor combination. The oscillator can be used with a wide range of power supply voltages.
The circuit generates a non-linear sawtooth waveform with a rising ramp.
At nodes 1 and 2, different waveforms are produced.
At node 1, a ramping waveform is available and at node 2, a pulsating waveform is available. The slope, and thus frequency of the ramping waveform is controlled by R4 and C1 and depends on the power supply voltage. Increasing R4 or C1 will decrease the frequency, same as when increasing the power supply The pulse width of the pulses that are generated when the ramp waveform resets is controlled by R3.
How it works:
Initially C1 is discharged, so node 1 is at 0V. Q2's base-emitter is reversed biased (the base of Q2 is at Vdd/2, while it's emitter is at 0V), so Q2 will not conduct. Because Q2 is open, Q1 doesn't get any base current and will not conduct either. The voltage over C1 will increase while the capacitor is being charged by the current flowing from the power supply via R4. At node 1, the voltage increases exponentially while C1 is charged. When the voltage over C1 reaches the point where the emitter-base junction of Q2 becomes forward biased (at about Vdd/2 + 0.7V), Q2 will start conducting. As a result Q1 will get base current via Q2 and will also start conducting, thereby pulling the base of Q2 low. The PUT combination is now latched in conduction and will discharge the capacitor C1 via R3. Because R3 has a low value, the capacitor is discharged fast via the PUT combination. The voltage a node 2 will no drop to 0V. When the voltage over C1 has dropped below 0.7V, Q2 will stop conducting and the PUT combination "unlatches" again, so C1 can charge via R4. The voltage at node 2 is now Vdd/2.This process repeats itself over and over. When R1 is changed to f.e. 1K, the waveform amplitudes at node 1 and 2 will be bigger, because the voltage at which the PUT combination will latch will be closer to Vdd. R3 is added so the pulse width of the pulses at node 2 can be adjusted. When R3 is increased, the pulse width of the pulses will increase.
6) PUT Relaxation Oscillator With Falling Ramp Waveform
The circuit in figure 6 works in the same way as the circuit of figure 5, but generates a non-linear sawtooth waveform with a falling ramp instead of a rising ramp.
The waveforms of this circuit are now related to Vdd instead of ground, because the circuit is "upside-down" compared with the previous circuit. When R2 is changed to f.e. 1K, the waveform amplitudes at node 1 and 2 will be bigger, because the voltage at which the PUT combination will latch will be closer to ground.R3 is added so the pulse width of the pulses at node 2 can be adjusted.
When R3 is increased, the pulse width of the pulses will increase.
Important notes for both previously described relaxation oscillator circuits :
The circuit in figure 7 uses a bootstrapping constant current source to charge C1 with a constant current, so we achieve a linear sawtooth waveform at node 1.The bootstrap is formed by Q3, that will conduct more current away from R5 and into the ground when the base emitter voltage exceeds 0.7V. So when the current through R5 increases such that the voltage over R5 exceeds 0.7V, the transistor will eat current away from R5 by letting more current flow into the ground. So it Q3 acts as a kind of overflow valve that draws abundant water into a well at the moment that the water flow is too high.Suppose the current through R5 would increase. Then the base-emitter voltage of Q3 increases, because the voltage over R5 increases. The result is that Q3 will conduct more, pulling it's emitter "lower" (closer to ground) by adding extra current through R4. When the voltage over R4 increases, this means the voltage over R5 must decrease, so the current through R5 decreases. This way Q3 keeps the current through R5 constant and C1 will be charged with a constant current, resulting in a linear rising voltage. As soon as the voltage reaches the threshold voltage at node 2, that is set by R1 and R2, the PUT will latch into conduction and fast discharges C1 via R3. The voltage at node 2 goes down to 0.7V volts. When C1 is fully discharged, the PUT does not receive enough current to stay latched, and unlatches. When the PUT unlatches, the voltage at node 2 jumps up to the threshold voltage again (which is close to the supply voltage) and C1 is charged again by the constant current source. The cycle repeats.The circuit can also be put "upside down" to get a linear sawtooth but with a falling ramp.
8) PUT Voltage Controlled Linear Sawtooth Generator
A simple voltage controlled current source can be made using a current mirror as can be seen in figure 8. In the circuit, the current mirror is formed by Q3 and Q4.
The control voltage is converted to a reference current, that is flowing from the power supply via the base-emitter junction of Q3 and through R4. Q4 mirrors a copy of this current, that is then used to charge C1. The lower the control voltage, the higher the current that is used to charge C1. So the higher the frequency of the sawtooth waveform. The frequency varies linearly with the control voltage. The control voltage can not be as high as the power supply because the transistors of the current mirror need at least 0.7V to conduct.
9) PUT Symmetrical Square Wave Generator
It is possible to generate symmetrical square waves using the PUT configuration as shown in figure 9.
To obtain a symmetrical square wave output at node 2, diode D1 and R5 have been added.
By adding D1, the junction between C1 and D1 is not fixed to the ground potential anymore, but can be pushed below zero, going negative.
During charging of C1, D1 is forward biased and the junction between C1 and D1 will be at +0.7V.
When the voltage at the junction of C1 and R4 reaches the trigger voltage of the PUT, Q2 will start conducting and will pull the junction between R4 and C1 down to the ground potential.
When this happens, the voltage at the junction of C1 and D1 will go negative, because C1 is still charged and D1 became reverse biased, so it will not conduct anymore.
C1 will then be discharged via R5, which is about twice the value of R4, so the discharge rate of C1 via R5 is equal to the charge rate via R4, resulting in a symmetrical waveform at node 2.
Discharge of C1 happens via R5 and discharges C1 from a negative voltage via R5 to the positive supply. Charging of C1 happens via R4 and charges C1 from 0V via R4 to the positive supply. To have an equal discharge and charge current, R5 should be twice the value of R4, so the discharge and charge currents are equal.
P.S. : R3 is not necessary in the circuit and can be omitted.
10) PUT LED Blinker
In figure 10a a LED blinker is shown, that is based on the PUT symmetrical square wave generator. The LED will blink on and off approximately every second when the power supply voltage is about +12V. With higher power supplies, the LED will blink faster because the charge current for C1 will be higher when the power supply is higher. With lower power supplies, the LED will blink slower, because the charge current of C1 will be lower when the power supply is lower. The value of R2 in the circuit was chosen for a power supply voltage of about +12V DC. Increase R2 when higher power supply voltage are used, so the current through the LED is about 15 mA for high efficiency LEDs
The circuit in figure 10b is the same circuit as the one in figure 10a but turned "upside down".
The circuit behaviour is exactly the same.
11) PUT LED Flasher V1
In figure 11 a LED flasher is shown that generates a flash approximately every second when the power supply voltage is about +12V DC. R3 (10K) determines the ON-time of the LED and thus the pulse width of the flash. With R3 = 10K, the pulse width is about 11ms.
The value of R5 in the schematic was chosen for a power supply voltage of about +12V DC..
Increase R5 when higher power supply voltage are used, so the current through the LED is about 15mA for high efficiency LEDs.
12) PUT LED Flasher V2 With Very Bright Flash
The circuit in figure 12 is based on the PUT symmetrical square wave generator to make a LED flasher, that generates a very bright flash approximately every second.
At first sight, the LED seems to be the connected upside down. But it is connected correctly. This is because the way we use C2 and D2 to generate a voltage at node 3 that rises above the power supply voltage. We want to generate a flash at the moment that node 2 pulled up to the supply rail by Q2 at the moment that the PUT latches into conduction. When Q2 is not conducting, C2 will be charged via D2 and R2. When Q2 starts conducting, node 2 will be pulled up to the supply rail, while C2 is charged. So at first instant, the voltage on node 3 will be the power supply voltage plus the voltage over C2. This means that the LED is forward biased and C2 will now discharge rapidly through the LED that starts conducting. Due to the instantaneous high discharge current, that is proportional to the size of C2 and the voltage over C2, the LED will show a bright flash. The timing of the circuit depends on the power supply voltage. So when changing the power supply, the frequency of the flashes will change.When you want to adjust the frequency of the flashes, the easiest way is to change the value C1. When changing resistors to change the frequency, this will also change the bias currents for the transistors. When these currents are too low, the PUT does not latch firmly or does not unlatch, causing the oscillator to stall or to not start at all. C2 can be increased to 220uF or 470uF to increase the discharge current of C2 through the LED, causing even more bright flashes.
13) PUT LED Flasher V3
The circuit in figure 13 flashes a LED approximately every second when the power supply voltage is about +12V DC. In this circuit, the LED is again connected in a different place, thereby saving the current limiting that was required in previous circuits. The current limiting for the LED is done by R2, because this resistor is put in series with the LED when the PUT is latched into conduction.
R3 determines the ON-time of the LED. The value of R2 was chosen for a power supply voltage of about +12V DC. When higher power supply voltages are used, increase R2 accordingly so the LED current is about 15mA for a high efficiency LED. For lower power supply voltages, decrease R2 to send more current through the LED.
14) PUT LED Fader With Linear Changing Brightness
The LED fader circuit in figure 14 uses a PUT to generate an almost linear triangular waveform and MOSFETs to create a semi-exponential current through the LED. The semi-exponential current is used to compensate for the logarithmic brightness perception of the human eye. So the LED fader appears to have a linear changing brightness.
At node (1) in the circuit, the almost linear triangular waveform is present.
R4 charges C1 and R3 discharges C1. So R4 determines the steepness of the positive slope and R3 determines the steepness of the falling slope. Q3 and Q4 form a MOSFET differential amplifier which has a very high input impedance, thus not influencing, while buffering the triangular waveform that is present over C1. The gate of Q4 is set to approximately 2,7V (with R8 and R9) which is around the gate threshold voltage of the MOSFET. Q3 will start conducting as soon as the voltage at node (1) reaches it's gate threshold voltage, which is about 2V. The current through the LED will not increase linear with the triangular input voltage applied, but will follow a square curve due to the FET square law, that defines the relation between the gate threshold voltage and the drain current of the FET.
The result is that the fading in and out of the LED intensity will be perceived as a pretty linear. With C1 = 33uF, the period of the triangular waveform will be about 3 seconds, meaning 1,5 sec for fade in and 1,5 sec for fade out. When you want a different frequency, just change C1.
Use a high efficiency LED to get enough brightness even with currents below 10mA.
Use a decent electrolytic capacitor with a low ESR and leakage for C1.
The other components are not critical.
The circuit is dimensioned to be used with a power supply of 5V.
When using higher supply voltages, R5 and R7 need to be adapted.
All resistors are 0.25W/10%.
15) PUT As a Unidirectional DIAC
BE CAREFUL WHEN BUILDING THESE CIRCUITS BECAUSE OF THE LETHAL VOLTAGE !
BUILD AT OWN RISK !
In the circuit of figure 15a, a PUT is used as a replacement for a DIAC trigger diode. DIAC's are mainly used as trigger devices for triacs or SCR's. A DIAC will start to conduct when the forward voltage or reverse voltage over the DIAC exceeds about 30V. The circuit behaves as a DIAC, but only in one direction (unidirectional DIAC). D2 is used to ensure that only positive voltages reach the PUT.
When the voltage on node 2 exceeds 10V, the PUT will latch into conduction, because the current and thus the voltage over R1 will increase until the voltage over R1 reaches 0.7V, causing Q2 to start conducting.
When the PUT is latched, it will stay latched until the current through the PUT transistors becomes low enough so the PUT unlatches again.
This happens when the amplitude of the input waveform has become low enough.
The circuit shown in figure 15b is a practical example of the use of a PUT to emulate the behaviour of a unidirectional DIAC. Here the PUT is used to trigger a triac. Phase control is provided by R3, R4 and C1.
The full wave rectifier (diode bridge) ensures that the PUT is always fed with a positive voltage because it only works with positive voltages.
16) PUT As Zero Crossing Detector
BE CAREFUL WHEN BUILDING THESE CIRCUITS BECAUSE OF THE LETHAL VOLTAGE !
BUILD AT OWN RISK !
In the circuit shown in figure 16, a PUT is used as part of a zero-crossing detector.
Zero-crossing detectors are used to in phase control for triacs or SCR's to control power for motors or lighting applications. The input is AC 220V/50Hz which is fed to the base of transistor Q1 and the emitter of Q2 via resistors R1 and R2, that limit the current.
The base of Q2 is connected to ground, so Q2 will conduct when the voltage at the junction of R2 and R3 is lower than -0.7V. Q1 will conduct when this voltage is higher than +0.7V.
So when the voltage at the junction of R2 and R3 is outside -0.7V to +0.7V, the output will be low and when the voltage is within -0.7V to +0.7V, the output will be high
This results in a pulse of about 250us in the middle of which is the zero-crossing of the AC input.
The pulse width is determined by the values of R1, R2 and R3.
That's all for now folks......
The transistor combination that we are describing here exhibits a similar behaviour as the UJT and is often called a Programmable Unijunction Transistor, abbreviated to "PUT". It is programmable because you can "program" the threshold level at which the transistor combination will latch itself into conduction.
In this lab project i will show you a collection of circuits that can be built around a "PUT" :
- non-linear sawtooth oscillator with rising or falling ramp
- linear sawtooth oscillator with rising ramp
- voltage controlled linear sawtooth oscillator with rising ramp
- symmetrical square wave oscillator
- LED blinker
- LED flasher V1
- LED flasher V2 with very bright flash
- LED flasher V3
- LED linear brightness fader
- PUT as a unidirectional DIAC
- PUT as a zero-crossing detector.
Of course this collection will never be complete, but the intention is to show you some circuit ideas, that might inspire you to create your own circuits and at the same time educate you a little bit in the world of analog electronics. Each circuit is explained without using mathematics but just using basic knowledge of how the individual components behave. So some basic knowledge is required to be able to understand how all this stuff works.
1) Let me Introduce to you : the PUT
In figure 1, the connection between the 2 complementary transistors forming the PUT is shown.
The configuration has a similar behaviour as a thyristor (SCR), but it is NOT a direct replacement for a thyristor ! Therefore the circuit is also called a "TUT" : Transistorised Universal Thyristor. Let's take a look at the behaviour of this configuration and compare it with the behaviour of a thyristor. What do we know about a thyristor ? Well, it has a gate, an anode and a cathode. When a small current is injected into the gate (milli-amperes), the thyristor will start to conduct, provided that the anode-to-cathode current is above a certain threshold, called latching current (IL). Once the thyristor is conducting, the gate can be disconnected, and the thyristor will still keep on conducting. The only way to make the thyristor stop conducting, is to make the anode-to-cathode current lower than the minimal holding current. So cutting off the power supply briefly will make the thyristor stop conducting again and return to the initial situation.
2) PUT Behaves Similar to a Thyristor (aka SCR)
The circuit shown in figure 2a behaves like a thyristor.
We can even choose between 2 gates: a positive gate connected to SWITCH2 and a negative gate connected to SWITCH1. At power on, SWITCH1 and SWITCH2 are open. Q1 will not conduct, because it's base is pulled high by R1. Q2 will not conduct, because it's base is floating and does not receive any current. Because Q1 does not conduct, the OUTput will be high.When SWITCH2 is open and SWITCH1 is closed, the base of Q1 is pulled to ground and Q1 will conduct. When Q1 conducts, the OUTput will go low and the base of Q2 receives current via R2, so Q2 will also conduct. When Q2 conducts, the base of Q1, which was pulled low by SWITCH1, is now pulled low by Q2. Due to this self-latching effect, Q1 will continue conducting, even when SWITCH1 is opened again. So when SWITCH1 is closed shortly, the OUTput will go low and stay low. The only way to reset the circuit back to the initial state, is to briefly disconnect it from the power supply. This is the same self-latching behaviour as a thyristor.When SWITCH1 is open and SWITCH2 is closed, the base of Q2 is pulled high and Q2 will conduct. When Q2 conducts, the base of Q1 is pulled low and Q1 will conduct. When Q1 conducts, the base of Q2, which was pulled high by SWITCH2, is now pulled high by Q1 via R2. Due to this self-latching effect, Q2 will continue conducting, even when SWITCH2 is opened again. So when SWITCH2 is closed shortly, the OUTput will go low and stay low. The only way to reset the circuit back to the initial state, is to briefly disconnect it from the power supply. This is the same self-latching behaviour as a thyristor.
Why the transistor combination is also called a PUT : Programmable Unijunction Transistor ? The difference between an ordinary unijunction transistor and a programmable unijunction transistor is the fact that the trip voltage, at which the transistor starts conducting, can be programmed by a reference voltage, that is applied to the gate of the PUT.
In figure 2b, two gate pins are shown because the PUT can be used either with Gate 1 or with Gate 2 used as a reference voltage input. When using Gate 1, the PUT will conduct when the anode voltage exceeds the reference voltage on Gate 1 with 0.7V (base emitter voltage drop). When using Gate 2, the PUT will conduct when the cathode becomes 0.7V lower than the voltage at Gate 2.
3) Simple PUT Circuit Explained
In figure 3 practical circuits are shown illustrating the behaviour of the PUT transistor combination.
The left and right circuits have exactly the same function. The right circuit is the "upside down" version of the left one.
Because R1 = R2, the reference voltage at node 1 is half the supply voltage, so 5 / 2 = 2.5V.
The voltage at node 2 can be set with a potmeter.
- Left circuit in figure 3:
When the voltage at node 2 is set to a voltage that is 0,7V lower than the voltage at node 1, then Q1 will start conducting, When Q1 starts conducting, the base of Q2 receives current via Q1, so Q2 starts conducting. When Q2 conducts, it will pull the base of Q1 to the positive rail, so Q1 will keep conducting. The transistor combination now latched itself into conduction and will continue conducting, even when lowering the voltage at node 2, so it becomes lower than the voltage of node 1.
The PUT will unlatch when the potmeter is set so the voltage at node 2 becomes close to the supply rail, so no current can flow through Q1 anymore, or when disconnecting the power supply briefly. - Right circuit in figure 3:
When the voltage at node 2 is set to a voltage that is 0,7V higher than the voltage at node 1, then Q1 will start conducting, When Q1 starts conducting, the base of Q2 receives current via Q1, so Q2 starts conducting. When Q2 conducts, it will pull the base of Q1 to ground, so Q1 will keep conducting. The transistor combination now latched itself into conduction and will continue conducting, even when lowering the voltage at node 2, so it becomes lower than the voltage of node 1. The PUT will unlatch when the potmeter is set so the voltage at node 2 becomes close to ground, so no current can flow through Q1 anymore, or when disconnecting the power supply briefly.
Another example of the behaviour of a PUT is shown in figure 4.
When the power is connected, the LED will illuminate, getting its current via R1 from the power supply. The PUT formed by Q1 and Q2 is not active because the base of Q1 is pulled down to ground by R4 and the base of Q2 is pulled up to the voltage over the LED. So both transistors are not conducting. From the moment that the switch is pressed, the base of Q1 receives current from the power supply via R3, which limits this current. Q1 starts conducting and pulls down the base of Q2, so current can flow through the base emitter junction of Q2 causing Q2 to conduct. Q2 will now pull up the base of Q1, so the base of Q1 receives current via Q2. This means that the PUT combination is now latched into conduction, thereby "short-circuiting" the LED, which will extinguish.
When releasing the switch, the PUT combination remains latched and the LED will stay off.
When the power supply is disconnected briefly, the PUT combination "unlatches" and the LED will illuminate again.
5) PUT Relaxation Oscillator With Rising Ramp Waveform
The circuit in figure 5 shows an implementations of a relaxation oscillator using the PUT transistor combination. The oscillator can be used with a wide range of power supply voltages.
The circuit generates a non-linear sawtooth waveform with a rising ramp.
At nodes 1 and 2, different waveforms are produced.
At node 1, a ramping waveform is available and at node 2, a pulsating waveform is available. The slope, and thus frequency of the ramping waveform is controlled by R4 and C1 and depends on the power supply voltage. Increasing R4 or C1 will decrease the frequency, same as when increasing the power supply The pulse width of the pulses that are generated when the ramp waveform resets is controlled by R3.
How it works:
Initially C1 is discharged, so node 1 is at 0V. Q2's base-emitter is reversed biased (the base of Q2 is at Vdd/2, while it's emitter is at 0V), so Q2 will not conduct. Because Q2 is open, Q1 doesn't get any base current and will not conduct either. The voltage over C1 will increase while the capacitor is being charged by the current flowing from the power supply via R4. At node 1, the voltage increases exponentially while C1 is charged. When the voltage over C1 reaches the point where the emitter-base junction of Q2 becomes forward biased (at about Vdd/2 + 0.7V), Q2 will start conducting. As a result Q1 will get base current via Q2 and will also start conducting, thereby pulling the base of Q2 low. The PUT combination is now latched in conduction and will discharge the capacitor C1 via R3. Because R3 has a low value, the capacitor is discharged fast via the PUT combination. The voltage a node 2 will no drop to 0V. When the voltage over C1 has dropped below 0.7V, Q2 will stop conducting and the PUT combination "unlatches" again, so C1 can charge via R4. The voltage at node 2 is now Vdd/2.This process repeats itself over and over. When R1 is changed to f.e. 1K, the waveform amplitudes at node 1 and 2 will be bigger, because the voltage at which the PUT combination will latch will be closer to Vdd. R3 is added so the pulse width of the pulses at node 2 can be adjusted. When R3 is increased, the pulse width of the pulses will increase.
6) PUT Relaxation Oscillator With Falling Ramp Waveform
The circuit in figure 6 works in the same way as the circuit of figure 5, but generates a non-linear sawtooth waveform with a falling ramp instead of a rising ramp.
The waveforms of this circuit are now related to Vdd instead of ground, because the circuit is "upside-down" compared with the previous circuit. When R2 is changed to f.e. 1K, the waveform amplitudes at node 1 and 2 will be bigger, because the voltage at which the PUT combination will latch will be closer to ground.R3 is added so the pulse width of the pulses at node 2 can be adjusted.
When R3 is increased, the pulse width of the pulses will increase.
Important notes for both previously described relaxation oscillator circuits :
- It is possible that the oscillator does not start when you are tweaking C1 and R4 to change the frequency. When that happens, then probably R4 has become too low. When R4 is too low, the PUT will not unlatch itself, because even though it has discharged C1, it still receives enough current via R4 to stay latched. In that case, increase R4 again and use a lower capacitor to get the desired frequency. Also R1 and R2 play a role in this game. When R1 and R2 are too high, the PUT does not receive enough gate current to firmly latch and C1 will not be discharged deep enough to unlatch the PUT again.
So it is better to have a low value of R1 and R2 than a high value. - R3 can not be increased without a limit. At a certain point, R3 will be too high so the PUT does not receive enough current to firmly latch into conduction and can not discharge C1 far enough to unlatch again. So the oscillator does not start when R3 is too high.
- For the same reason, R4 has a high value, so the PUT can discharge the capacitor far enough to unlatch again. When lowering R4, R1 and R2 should be lowered to compensate so the PUT can draw more current out of C1 to discharge C1 deep enough to unlatch again. When f.e. changing R4 to 100K, R1 and R2 should be lowered to 1K,.
The circuit in figure 7 uses a bootstrapping constant current source to charge C1 with a constant current, so we achieve a linear sawtooth waveform at node 1.The bootstrap is formed by Q3, that will conduct more current away from R5 and into the ground when the base emitter voltage exceeds 0.7V. So when the current through R5 increases such that the voltage over R5 exceeds 0.7V, the transistor will eat current away from R5 by letting more current flow into the ground. So it Q3 acts as a kind of overflow valve that draws abundant water into a well at the moment that the water flow is too high.Suppose the current through R5 would increase. Then the base-emitter voltage of Q3 increases, because the voltage over R5 increases. The result is that Q3 will conduct more, pulling it's emitter "lower" (closer to ground) by adding extra current through R4. When the voltage over R4 increases, this means the voltage over R5 must decrease, so the current through R5 decreases. This way Q3 keeps the current through R5 constant and C1 will be charged with a constant current, resulting in a linear rising voltage. As soon as the voltage reaches the threshold voltage at node 2, that is set by R1 and R2, the PUT will latch into conduction and fast discharges C1 via R3. The voltage at node 2 goes down to 0.7V volts. When C1 is fully discharged, the PUT does not receive enough current to stay latched, and unlatches. When the PUT unlatches, the voltage at node 2 jumps up to the threshold voltage again (which is close to the supply voltage) and C1 is charged again by the constant current source. The cycle repeats.The circuit can also be put "upside down" to get a linear sawtooth but with a falling ramp.
8) PUT Voltage Controlled Linear Sawtooth Generator
A simple voltage controlled current source can be made using a current mirror as can be seen in figure 8. In the circuit, the current mirror is formed by Q3 and Q4.
The control voltage is converted to a reference current, that is flowing from the power supply via the base-emitter junction of Q3 and through R4. Q4 mirrors a copy of this current, that is then used to charge C1. The lower the control voltage, the higher the current that is used to charge C1. So the higher the frequency of the sawtooth waveform. The frequency varies linearly with the control voltage. The control voltage can not be as high as the power supply because the transistors of the current mirror need at least 0.7V to conduct.
9) PUT Symmetrical Square Wave Generator
It is possible to generate symmetrical square waves using the PUT configuration as shown in figure 9.
To obtain a symmetrical square wave output at node 2, diode D1 and R5 have been added.
By adding D1, the junction between C1 and D1 is not fixed to the ground potential anymore, but can be pushed below zero, going negative.
During charging of C1, D1 is forward biased and the junction between C1 and D1 will be at +0.7V.
When the voltage at the junction of C1 and R4 reaches the trigger voltage of the PUT, Q2 will start conducting and will pull the junction between R4 and C1 down to the ground potential.
When this happens, the voltage at the junction of C1 and D1 will go negative, because C1 is still charged and D1 became reverse biased, so it will not conduct anymore.
C1 will then be discharged via R5, which is about twice the value of R4, so the discharge rate of C1 via R5 is equal to the charge rate via R4, resulting in a symmetrical waveform at node 2.
Discharge of C1 happens via R5 and discharges C1 from a negative voltage via R5 to the positive supply. Charging of C1 happens via R4 and charges C1 from 0V via R4 to the positive supply. To have an equal discharge and charge current, R5 should be twice the value of R4, so the discharge and charge currents are equal.
P.S. : R3 is not necessary in the circuit and can be omitted.
10) PUT LED Blinker
In figure 10a a LED blinker is shown, that is based on the PUT symmetrical square wave generator. The LED will blink on and off approximately every second when the power supply voltage is about +12V. With higher power supplies, the LED will blink faster because the charge current for C1 will be higher when the power supply is higher. With lower power supplies, the LED will blink slower, because the charge current of C1 will be lower when the power supply is lower. The value of R2 in the circuit was chosen for a power supply voltage of about +12V DC. Increase R2 when higher power supply voltage are used, so the current through the LED is about 15 mA for high efficiency LEDs
The circuit in figure 10b is the same circuit as the one in figure 10a but turned "upside down".
The circuit behaviour is exactly the same.
11) PUT LED Flasher V1
In figure 11 a LED flasher is shown that generates a flash approximately every second when the power supply voltage is about +12V DC. R3 (10K) determines the ON-time of the LED and thus the pulse width of the flash. With R3 = 10K, the pulse width is about 11ms.
The value of R5 in the schematic was chosen for a power supply voltage of about +12V DC..
Increase R5 when higher power supply voltage are used, so the current through the LED is about 15mA for high efficiency LEDs.
12) PUT LED Flasher V2 With Very Bright Flash
The circuit in figure 12 is based on the PUT symmetrical square wave generator to make a LED flasher, that generates a very bright flash approximately every second.
At first sight, the LED seems to be the connected upside down. But it is connected correctly. This is because the way we use C2 and D2 to generate a voltage at node 3 that rises above the power supply voltage. We want to generate a flash at the moment that node 2 pulled up to the supply rail by Q2 at the moment that the PUT latches into conduction. When Q2 is not conducting, C2 will be charged via D2 and R2. When Q2 starts conducting, node 2 will be pulled up to the supply rail, while C2 is charged. So at first instant, the voltage on node 3 will be the power supply voltage plus the voltage over C2. This means that the LED is forward biased and C2 will now discharge rapidly through the LED that starts conducting. Due to the instantaneous high discharge current, that is proportional to the size of C2 and the voltage over C2, the LED will show a bright flash. The timing of the circuit depends on the power supply voltage. So when changing the power supply, the frequency of the flashes will change.When you want to adjust the frequency of the flashes, the easiest way is to change the value C1. When changing resistors to change the frequency, this will also change the bias currents for the transistors. When these currents are too low, the PUT does not latch firmly or does not unlatch, causing the oscillator to stall or to not start at all. C2 can be increased to 220uF or 470uF to increase the discharge current of C2 through the LED, causing even more bright flashes.
13) PUT LED Flasher V3
The circuit in figure 13 flashes a LED approximately every second when the power supply voltage is about +12V DC. In this circuit, the LED is again connected in a different place, thereby saving the current limiting that was required in previous circuits. The current limiting for the LED is done by R2, because this resistor is put in series with the LED when the PUT is latched into conduction.
R3 determines the ON-time of the LED. The value of R2 was chosen for a power supply voltage of about +12V DC. When higher power supply voltages are used, increase R2 accordingly so the LED current is about 15mA for a high efficiency LED. For lower power supply voltages, decrease R2 to send more current through the LED.
14) PUT LED Fader With Linear Changing Brightness
The LED fader circuit in figure 14 uses a PUT to generate an almost linear triangular waveform and MOSFETs to create a semi-exponential current through the LED. The semi-exponential current is used to compensate for the logarithmic brightness perception of the human eye. So the LED fader appears to have a linear changing brightness.
At node (1) in the circuit, the almost linear triangular waveform is present.
R4 charges C1 and R3 discharges C1. So R4 determines the steepness of the positive slope and R3 determines the steepness of the falling slope. Q3 and Q4 form a MOSFET differential amplifier which has a very high input impedance, thus not influencing, while buffering the triangular waveform that is present over C1. The gate of Q4 is set to approximately 2,7V (with R8 and R9) which is around the gate threshold voltage of the MOSFET. Q3 will start conducting as soon as the voltage at node (1) reaches it's gate threshold voltage, which is about 2V. The current through the LED will not increase linear with the triangular input voltage applied, but will follow a square curve due to the FET square law, that defines the relation between the gate threshold voltage and the drain current of the FET.
The result is that the fading in and out of the LED intensity will be perceived as a pretty linear. With C1 = 33uF, the period of the triangular waveform will be about 3 seconds, meaning 1,5 sec for fade in and 1,5 sec for fade out. When you want a different frequency, just change C1.
Use a high efficiency LED to get enough brightness even with currents below 10mA.
Use a decent electrolytic capacitor with a low ESR and leakage for C1.
The other components are not critical.
The circuit is dimensioned to be used with a power supply of 5V.
When using higher supply voltages, R5 and R7 need to be adapted.
All resistors are 0.25W/10%.
15) PUT As a Unidirectional DIAC
BE CAREFUL WHEN BUILDING THESE CIRCUITS BECAUSE OF THE LETHAL VOLTAGE !
BUILD AT OWN RISK !
In the circuit of figure 15a, a PUT is used as a replacement for a DIAC trigger diode. DIAC's are mainly used as trigger devices for triacs or SCR's. A DIAC will start to conduct when the forward voltage or reverse voltage over the DIAC exceeds about 30V. The circuit behaves as a DIAC, but only in one direction (unidirectional DIAC). D2 is used to ensure that only positive voltages reach the PUT.
When the voltage on node 2 exceeds 10V, the PUT will latch into conduction, because the current and thus the voltage over R1 will increase until the voltage over R1 reaches 0.7V, causing Q2 to start conducting.
When the PUT is latched, it will stay latched until the current through the PUT transistors becomes low enough so the PUT unlatches again.
This happens when the amplitude of the input waveform has become low enough.
The circuit shown in figure 15b is a practical example of the use of a PUT to emulate the behaviour of a unidirectional DIAC. Here the PUT is used to trigger a triac. Phase control is provided by R3, R4 and C1.
The full wave rectifier (diode bridge) ensures that the PUT is always fed with a positive voltage because it only works with positive voltages.
16) PUT As Zero Crossing Detector
BE CAREFUL WHEN BUILDING THESE CIRCUITS BECAUSE OF THE LETHAL VOLTAGE !
BUILD AT OWN RISK !
In the circuit shown in figure 16, a PUT is used as part of a zero-crossing detector.
Zero-crossing detectors are used to in phase control for triacs or SCR's to control power for motors or lighting applications. The input is AC 220V/50Hz which is fed to the base of transistor Q1 and the emitter of Q2 via resistors R1 and R2, that limit the current.
The base of Q2 is connected to ground, so Q2 will conduct when the voltage at the junction of R2 and R3 is lower than -0.7V. Q1 will conduct when this voltage is higher than +0.7V.
So when the voltage at the junction of R2 and R3 is outside -0.7V to +0.7V, the output will be low and when the voltage is within -0.7V to +0.7V, the output will be high
This results in a pulse of about 250us in the middle of which is the zero-crossing of the AC input.
The pulse width is determined by the values of R1, R2 and R3.
That's all for now folks......
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